1. Field of the Invention
The present invention relates to a data transfer device and a data transfer system which ensure data transfer between a master device capable of outputting a plurality of transfer requests and a plurality of slave devices such as memories.
2. Description of the Related Art
Suppose that when transferring data between the master device that outputs the transfer requests and the slave devices, the order in which the data are transferred should be maintained. In this case, the master device generally outputs one transfer request and, after the corresponding transfer is completed, outputs the next transfer request.
In the above case, the order of responses is maintained although there are a plurality of slaves to which the transfer requests are outputted, but it is difficult to increase the efficiency in data transfer.
As such, there are techniques of outputting the plurality of transfer requests in advance in order to increase the efficiency in data transfer.
As systems (methods) in which the master device outputs the transfer requests to the plurality of slave devices in advance, there are known systems (methods) as described below.
In a first system (method), the master device issues the transfer requests with an appropriate pause(s), paying attention to the target slave devices.
In a second system, the master device has an internal buffer of sufficient size and a control capability and is designed to be able to successfully operate regardless of the order of the responses.
In a third system, a bridge that is capable of storing the order of the transfer requests and has a data buffer of sufficient size is used to ensure the order of the responses.
Japanese Patent Laid-open No. 2001-175588 describes a bus controller that has inside it a master queue and a slave queue separately and manages the queues separately using a master queue managing section and a slave queue managing section.
Japanese Patent Laid-open No. 2001-188749 describes a bus controller that carries out access control regarding the plurality of slave devices based on a request from the master device. This bus controller determines whether a slave device indicated by an address of an access request from the master device is the same as a slave device that is currently being accessed, and determines a time to start accessing the slave device based on the access request from the master device.